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Mentor Graphics Video: Automatically Unravel Complex FPGA Signals
December 2, 2015 | Mentor GraphicsEstimated reading time: Less than a minute
Optimizing large pin-count FPGAs is challenging. Manual optimization can take days and result in reduced quality.
This new video from Mentor Graphics shows how signal pin assignments can be automatically optimized between multiple FPGAs on the PCB while respecting pin-specific rules and constraints. Reduce the number of routing layers, minimize crossovers and overall trace lengths on the PCB, and reduce signal integrity issues for higher completion rates and shorter FPGA route times.
To watch this video, click here.
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Embedded World 2024: Rohde & Schwarz Presents its Cutting-edge Test Solutions for Embedded Systems
03/27/2024 | Rohde & SchwarzEmbedded systems are the foundation of today’s electronic devices, spanning sectors as diverse as consumer electronics, telecommunications, industrial, medical, automotive and aerospace applications.
Reassessing Surface Finish Performance for Next-gen Technology, Part 2
03/04/2024 | Frank Xu, PhD and Martin Bunce of MacDermid Alpha, and John Coonrod of Rogers Corp.The introduction of 5G/6G has created a growing demand for faster rates of data transfer and operation at higher frequencies, pushing signals to travel toward the outer edges of conductors. As a result, the surface finish applied over the copper circuitry is now gaining more attention.
Beyond Design: Embedded Capacitance Material
02/22/2024 | Barry Olney -- Column: Beyond DesignEmbedding components into the multilayer PCB substrate can have many benefits, including reduced board size and improved signal integrity. However, embedded capacitance material (which is not really a component but rather part of the substrate) can improve power integrity dramatically by reducing AC impedance and generally enhancing the performance of the product. It takes up no additional space, is easy to implement (because it is compatible with standard FR-4 processes), and can be cost-effective.
RoBAT Brings TDR Test to Bare and Assembled PCBs
02/19/2024 | Andy Shaughnessy, Design007 MagazineIn an interview at DesignCon, Gregory Miczek, global applications manager with RoBAT, discussed the company’s background and its expansion path from backplane defect analyzers to TDR testers for high-tech bare and assembled boards.