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| 54129 Records Searched | 233 Matches |
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 |  | Electronics Midwest Features Live Assembly Line Friday, September 03, 2010 | IPC The Electronics Assembly Suppliers' Initiative (EASi) Line will feature twelve of the industry's top suppliers, with on-site experts available to talk about the EASi-Line's state-of-the-art processes, materials and equipment.
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| | Mexitronica 2010 Cancelled Wednesday, September 01, 2010 | ROC Exhibitions A statement from ROC Exhibitions reads: "Mexitronica 2010 will not take place as planned this October. The exposition failed to win the support of a representative mix of industry suppliers."
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| | Role of Solder Paste in New Decade of Packaging and Assembly, Part II Wednesday, September 01, 2010 | Dr. Jennie S. Hwang Solder paste printing is a critical step in surface mount manufacturing, as printing results directly affect the quality and yield of assembly. Good printing results rely on the "proper" solder paste theology in addition to the printing equipment and the printing operating process, including printer set-up and stencil design and selection.
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 |  | Assembléon Launches European Web Shop Wednesday, September 01, 2010 | Assembléon "The shop will allow our customers to maintain the levels they need of high-quality spare parts, accessories and consumables," said Ton Cornelissen, General Manager for Sales in Europe.
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|  | Ionic Cleanliness Testing of PWBs for Process Control, Part II Tuesday, August 31, 2010 | Mike Bixenman, D.B.A., Kyzen Corp.; Ning-Chen Lee, Ph.D., Indium Corp.; and Steve Stach, Austin American Tech. In this study, the authors research low-residue and lead-free flux structures, identify solvent compositions that will dissolve these residue types and offer options for performing both bulk and site-specific ionic cleanliness testing methods. Don't miss Part II of this exciting research.
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|  | Manncorp Revamps Entire Line of Rework Systems Tuesday, August 31, 2010 | Manncorp A new line of rework systems, ranging from manually assisted models for video game repair to versatile, fully automatic versions with split vision, can now be seen at manncorp/smt/rework.com.
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|  | Effects of Storage Procedures and Bake Out on Solderability of Immersion Silver-Coated PCBs Tuesday, January 19, 2010 | Paul Vianco, Edwin Lopez, William Wallace, Alice Kilgo, and Samuel Lucero - Sandia National Laboratories Authors from Sandia National Laboratories investigate the solderability of current immersion Ag technology after exposure to conditions that simulate long-term storage followed by bake out environments prior to actual reflow assembly.
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| | Closed-Form, Strain-Energy-Based Acceleration Factors for Thermal Cycling of Lead-Free Assemblies Tuesday, February 02, 2010 | Jean-Paul Clech, EPSI Inc.; Gregory Henshall and Jian Miremadi, HP A framework has been developed for a new type of closed-form AF model for thermal cycling of soldered assemblies. The AF model is strain-energy-based, and was applied to SAC305, SAC387/396/405 and near-eutectic SnPb assemblies. The advantages and limitations of this model compared to other approaches in the reliability engineer's toolbox are also discussed.
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|  | SMT Magazine Earns Positive Reviews, Mostly Monday, August 23, 2010 | SMT Magazine The reviews are in--and we're not talking about the latest summer blockbuster. Just one month after acquiring SMT Magazine, I-Connect007 published its first issue of the magazine. The feedback from loyal SMT readers has been overwhelmingly positive. SMT Magazine is just one example of what we have planned for the future.
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 |  | Computrol Exhibits at Amcon Design & Manufacturing Expo Wednesday, August 18, 2010 | PRLog Computrol, Inc. announces that it will exhibit in booths #200 and #202 at the upcoming AmCon Design & Contract Manufacturing Expo, September 14-15, 2010, at the Salt Palace Convention Center in Salt Lake City, Utah.
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| | New Solder Bumping Technology, Processes for 100 µm Pitch Flip-Chip Technology With Capillary Flow or No-Flow Underfill, Part I Tuesday, September 07, 2010 | Florian Schüßler, Univ. Erlangen-Nuremberg; Rainer Dohle, Dr.-Ing., Micro Systems Engineering GmbH; Thomas Oppert and Ghassem Azdasht, Packaging Technologies GmbH; Georgi Georgiev, KSG Leiterplatten GmbH; and Jörg Franke, Univ. Erlangen-Nuremberg The authors of this paper present new cost-efficient solder bumping and adapted assembly technologies for the processing of flip-chips with a pitch of 100 µm or less and solder ball diameters of 60 µm or 50 µm, respectively.
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 |  | Electronics Midwest Features Live Assembly Line Friday, September 03, 2010 | IPC The Electronics Assembly Suppliers' Initiative (EASi) Line will feature twelve of the industry's top suppliers, with on-site experts available to talk about the EASi-Line's state-of-the-art processes, materials and equipment.
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|  | Ionic Cleanliness Testing of PWBs for Process Control, Part II Tuesday, August 31, 2010 | Mike Bixenman, D.B.A., Kyzen Corp.; Ning-Chen Lee, Ph.D., Indium Corp.; and Steve Stach, Austin American Tech. In this study, the authors research low-residue and lead-free flux structures, identify solvent compositions that will dissolve these residue types and offer options for performing both bulk and site-specific ionic cleanliness testing methods. Don't miss Part II of this exciting research.
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|  | Effects of Storage Procedures and Bake Out on Solderability of Immersion Silver-Coated PCBs Tuesday, January 19, 2010 | Paul Vianco, Edwin Lopez, William Wallace, Alice Kilgo, and Samuel Lucero - Sandia National Laboratories Authors from Sandia National Laboratories investigate the solderability of current immersion Ag technology after exposure to conditions that simulate long-term storage followed by bake out environments prior to actual reflow assembly.
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| | Closed-Form, Strain-Energy-Based Acceleration Factors for Thermal Cycling of Lead-Free Assemblies Tuesday, February 02, 2010 | Jean-Paul Clech, EPSI Inc.; Gregory Henshall and Jian Miremadi, HP A framework has been developed for a new type of closed-form AF model for thermal cycling of soldered assemblies. The AF model is strain-energy-based, and was applied to SAC305, SAC387/396/405 and near-eutectic SnPb assemblies. The advantages and limitations of this model compared to other approaches in the reliability engineer's toolbox are also discussed.
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|  | Embedded Die Assembly for High-Rel Applications Thursday, August 19, 2010 | Real Time With...IPC APEX Expo 2010  Casey Cooper, Microelectronics Lab Manager at STI, talks about the company's various educational, training and technology offerings and provides an overview of the company's newly-developed and tested embedded die assembly. The new assembly is being evaluated by some military product developers for high-reliability applications.
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| | Reid on Reliability: Interconnect Separation Anxiety Wednesday, August 11, 2010 | Paul Reid, PWB Inc. Interconnect separation is usually expressed as a crack that propagates at the internal interconnection. This failure mode produces a crack that is wedge-shaped, with the large end on the side of the foil closest to the middle of the PWB. An interconnect failure frequently develops slowly over time, accumulating damage at a constant rate after onset.
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| | New Package, Interconnect Technologies for Ultra-Thin Chips Tuesday, August 03, 2010 | Christine Kallmayer & Rolf Aschenbrenner, Fraunhofer IZM; Julian Haberland &Herbert Reichl, Technical University Berlin For several years technologies have been developed for the embedding of chips in circuit boards to achieve 3-D packages using conventional processes from PCB manufacturing. Ultra-thin chips are suited to be integrated in rigid circuit boards, as well as on, and in, multilayer flexible substrates.
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|  | Mr. Reliability on Lead-Free-Related Issues Tuesday, June 22, 2010 | Real Time With...IPC APEX Expo 2010  Werner Engelmaier, noted author and expert in all things reliability, discusses reliability issues related to lead-free and RoHS. He notes three failure modes he's seeing more of: Pad cratering, trace lifting/buckling and "eyebrow" cracking. Adjusting board cooling rates can help tackle such issues, but, sometimes, that's not enough.
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|  | The Challenges of PoP Devices During Assembly and Inspection Tuesday, July 27, 2010 | Bob Willis, askbobwillis.com and David Bernard, Dage Precision Industries This paper outlines the process associated with soldering stacked packages using dip flux and dip solder pastes specifically designed to overcome the incidence of package warp. Based on the process issues involved, inspection results are presented to better illustrate the challenges in implementing PoP into production.
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| | New Solder Bumping Technology, Processes for 100 µm Pitch Flip-Chip Technology With Capillary Flow or No-Flow Underfill, Part I Tuesday, September 07, 2010 | Florian Schüßler, Univ. Erlangen-Nuremberg; Rainer Dohle, Dr.-Ing., Micro Systems Engineering GmbH; Thomas Oppert and Ghassem Azdasht, Packaging Technologies GmbH; Georgi Georgiev, KSG Leiterplatten GmbH; and Jörg Franke, Univ. Erlangen-Nuremberg The authors of this paper present new cost-efficient solder bumping and adapted assembly technologies for the processing of flip-chips with a pitch of 100 µm or less and solder ball diameters of 60 µm or 50 µm, respectively.
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|  | Ionic Cleanliness Testing of PWBs for Process Control, Part II Tuesday, August 31, 2010 | Mike Bixenman, D.B.A., Kyzen Corp.; Ning-Chen Lee, Ph.D., Indium Corp.; and Steve Stach, Austin American Tech. In this study, the authors research low-residue and lead-free flux structures, identify solvent compositions that will dissolve these residue types and offer options for performing both bulk and site-specific ionic cleanliness testing methods. Don't miss Part II of this exciting research.
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|  | Effects of Storage Procedures and Bake Out on Solderability of Immersion Silver-Coated PCBs Tuesday, January 19, 2010 | Paul Vianco, Edwin Lopez, William Wallace, Alice Kilgo, and Samuel Lucero - Sandia National Laboratories Authors from Sandia National Laboratories investigate the solderability of current immersion Ag technology after exposure to conditions that simulate long-term storage followed by bake out environments prior to actual reflow assembly.
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| | Closed-Form, Strain-Energy-Based Acceleration Factors for Thermal Cycling of Lead-Free Assemblies Tuesday, February 02, 2010 | Jean-Paul Clech, EPSI Inc.; Gregory Henshall and Jian Miremadi, HP A framework has been developed for a new type of closed-form AF model for thermal cycling of soldered assemblies. The AF model is strain-energy-based, and was applied to SAC305, SAC387/396/405 and near-eutectic SnPb assemblies. The advantages and limitations of this model compared to other approaches in the reliability engineer's toolbox are also discussed.
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|  | Embedded Die Assembly for High-Rel Applications Thursday, August 19, 2010 | Real Time With...IPC APEX Expo 2010  Casey Cooper, Microelectronics Lab Manager at STI, talks about the company's various educational, training and technology offerings and provides an overview of the company's newly-developed and tested embedded die assembly. The new assembly is being evaluated by some military product developers for high-reliability applications.
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| | Reid on Reliability: Interconnect Separation Anxiety Wednesday, August 11, 2010 | Paul Reid, PWB Inc. Interconnect separation is usually expressed as a crack that propagates at the internal interconnection. This failure mode produces a crack that is wedge-shaped, with the large end on the side of the foil closest to the middle of the PWB. An interconnect failure frequently develops slowly over time, accumulating damage at a constant rate after onset.
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| | Section 11: SMT Assembly Defects Wednesday, August 11, 2010 | Tom Clifford, Consultant These images of SMT defects and attributes were compiled by consultant Tom Clifford. Section 11 includes images of odd via-fill, fiber debris, lead-on-land, bridges, tombstoning, dead-shorts, "type G" defects and more. These images of SMT defects and attributes provide resources for training, quality control specs and standards and research.
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| | New Column: Get SMART by John Burke Wednesday, August 04, 2010 | John Burke, RoHSUSA.com Over the coming weeks in this column I will be highlighting the types of questions and answers discussed on TechNet and smart-e-link. This should give you a quick reality-check on the kinds of issues faced by the industry or individual engineers.
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|  | Role of Solder Paste in New Decade of Packaging and Assembly Wednesday, August 04, 2010 | Dr. Jennie S. Hwang Surface mount has been a critical manufacturing technology for the electronics PCB assembly for three decades (plus or minus a couple years) and is expected to continually play an important role in the years to come. In parallel, solder paste will continue to be the most viable interconnecting material for circuit board level mass production. As an electronic material, solder paste is "old," as well as "new."
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|  | Mr. Reliability on Lead-Free-Related Issues Tuesday, June 22, 2010 | Real Time With...IPC APEX Expo 2010  Werner Engelmaier, noted author and expert in all things reliability, discusses reliability issues related to lead-free and RoHS. He notes three failure modes he's seeing more of: Pad cratering, trace lifting/buckling and "eyebrow" cracking. Adjusting board cooling rates can help tackle such issues, but, sometimes, that's not enough.
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| | Role of Solder Paste in New Decade of Packaging and Assembly, Part II Wednesday, September 01, 2010 | Dr. Jennie S. Hwang Solder paste printing is a critical step in surface mount manufacturing, as printing results directly affect the quality and yield of assembly. Good printing results rely on the "proper" solder paste theology in addition to the printing equipment and the printing operating process, including printer set-up and stencil design and selection.
|
| | Reid on Reliability: Interconnect Separation Anxiety Wednesday, August 11, 2010 | Paul Reid, PWB Inc. Interconnect separation is usually expressed as a crack that propagates at the internal interconnection. This failure mode produces a crack that is wedge-shaped, with the large end on the side of the foil closest to the middle of the PWB. An interconnect failure frequently develops slowly over time, accumulating damage at a constant rate after onset.
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| | New Column: Get SMART by John Burke Wednesday, August 04, 2010 | John Burke, RoHSUSA.com Over the coming weeks in this column I will be highlighting the types of questions and answers discussed on TechNet and smart-e-link. This should give you a quick reality-check on the kinds of issues faced by the industry or individual engineers.
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|  | Role of Solder Paste in New Decade of Packaging and Assembly Wednesday, August 04, 2010 | Dr. Jennie S. Hwang Surface mount has been a critical manufacturing technology for the electronics PCB assembly for three decades (plus or minus a couple years) and is expected to continually play an important role in the years to come. In parallel, solder paste will continue to be the most viable interconnecting material for circuit board level mass production. As an electronic material, solder paste is "old," as well as "new."
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 |  | The Next Stage of Assembly: 3-D and Solder-Free Thursday, July 22, 2010 | Harvey Miller, Fabfile Online Solder-free and 3-D assembly will help bridge the performance and density gaps needed to extend Moore's Law, as lithography on silicon runs out of steam. It will offer America the chance to restore her electronic manufacturing mojo and provide for her security. Please, America, don't miss this chance to leap-frog the rest of the world!
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|  | Flexible Thinking: Supporting Components on Flex Circuit Assemblies Wednesday, July 21, 2010 | Joe Fjelstad, Verdant Electronics With proper planning, stiffeners can be designed to aid assembly through the designed manufacture of a flex circuit that can be handled as if it were a rigid circuit board. Such constructions can be accomplished by using any one of several methods.
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|  | Great Education Online, If You Know Where to Look Wednesday, July 14, 2010 | Andy Shaughnessy, PCBDesign007 Many Internet sources provide education and training in our respective fields. You just have to know where to look. It's not quite like attending a live training event, but you can improve your skill set through the Internet, and you can often do so free of charge.
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|  | Reid on Reliability: The Corner Crack Wednesday, July 07, 2010 | Paul Reid, PWB Corner cracks are observed less often than barrel cracks, but with high-rel boards, we can't be too careful. Unlike barrel cracks, which can fail catastrophically, knee cracks tend to propagate over time. The damaged pad actually resembles a funnel and the warp and weft of the glass give the funnel an uneven, puckered shape.
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 |  | Kate Mayer: How to Study for the CID Exam Wednesday, July 07, 2010 | Kate Mayer, Mayer Consulting No one likes to take tests, but passing the CID certification exam just might help you differentiate yourself the next time you're searching for employment. Here are some firsthand certification study tips from CID instructor Kate Mayer, a veteran PCB designer and consultant.
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| | Jack Olson: Component Placement Tutorial, Part II Wednesday, June 30, 2010 | Jack Olson, CID+ At this point, you should have mounting holes, tooling holes and fiducials placed, keepout areas defined and components with fixed locations placed and locked down. You've decided whether your design will be single-sided or double-sided. Now, let's get started placing components!
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